Novel Construction of Short Length Ldpc Codes for Simple Decoding

This paper introduces different construction techniques of parity-check matrix H for irregular LowDensity Parity-Check (LDPC) codes. The first one is the proposed Accurate Random Construction Technique (ARCT) which is an improvement of the Random Construction Technique (RCT) to satisfy an accurate profile. The second technique, Speed Up Technique (SUT), improves the performance of irregular LDPC codes by growing H from proposed initial construction but not from empty matrix as usual. The third and fourth techniques are further improvements of the SUT that insure simpler decoding. In Double Speed Up Technique (DSUT), the decoder size of SUT matrix is fixed and the size of H is doubled. In Partitioned Speed Up Technique (PSUT), the H size is fixed and the decoder size decreases by using small size of SUT matrices to grow H. Simulations show that the performance of LDPC codes formed using SUT outperforms ARCT at block length N = 1000 with 0.342dB at BER = 10 and LDPC codes created by DSUT outperforms SUT with 0.194dB at BER = 10. Simulations illustrate that the partitioning of H to small SUT submatrices not only simplifies the decoding process, it also simplifies the implementation and improves the performance. The improvement, in case of half, is 0.139dB at BER=10 5 however as partitioning increases the performance degrades. It is about 0.322dB at BER=10 in case of one-fourth.